W3DG64128V-D1 1 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs may 2005 rev. 2 preliminary* 1gb C 2x64mx64 sdram, unbuffered w/pll features pc100 and pc133 compatible burst mode operation auto and self refresh capability lvttl compatible inputs and outputs serial presence detect with eeprom fully synchronous: all signals are registered on the positive edge of the system clock programmable burst lengths: 1, 2, 4, 8 or full page 3.3v 0.3v power supply 144 pin so-dimm ? pbc height: 31.75 (1.25) description the w3dg64128v is a 2x64mx64 synchronous dram module which consists of eight 128mx8 stack of sdram components in tsop ii package, and one 2kb eeprom in an 8 pin tssop package for serial presence detect which are mounted on a 144 pin so-dimm multilayer fr4 substrate. this module is structured as 2 ranks of 64mx64 sdram. * this product is under development, is not quali? ed or characterized and is subject to change without notice. note: consult factory for availability of: ? rohs products ? vendor source control options ? industrial temperature option a0 C a12 address input (multiplexed) ba0-1 select bank dq0-63 data input/output ck0 clock input cke0, cke1 clock enable input cs0#, cs1# chip select input ras# row address strobe cas# column address strobe we# write enable dqm0-7 dqm v cc power supply (3.3v) v ss ground sda serial data i/o scl serial clock dnu do not use nc no connect pin configurations (front side/back side) pin names pinout pin front pin back pin front pin back pin back pin back 1v ss 2v ss 49 dq13 50 dq45 97 dq22 98 dq54 3 dq0 4 dq32 51 dq14 52 dq46 99 dq23 100 dq55 5 dq1 6 dq33 53 dq15 54 dq47 101 v cc 102 v cc 7 dq2 8 dq34 55 v ss 56 v ss 103 a6 104 a7 9 dq3 10 dq35 57 nc 58 nc 105 a8 106 ba0 11 v cc 12 v cc 59 nc 60 nc 107 v ss 108 v ss 13 dq4 14 dq36 61 ck0 62 cke0 109 a9 110 ba1 15 dq5 16 dq37 63 v cc 64 v cc 111 a10 112 a11 17 dq6 18 dq38 65 ras# 66 cas# 113 v cc 114 v cc 19 dq7 20 dq39 67 we# 68 cke1 115 dqmb2 116 dqmb6 21 v ss 22 v ss 69 cs0# 70 a12 117 dqmb3 118 dqmb7 23 dqm0 24 dqm4 71 cs1# 72 nc 119 v ss 120 v ss 25 dqm1 26 dqm5 73 nc 74 nc 121 dq24 122 dq56 27 v cc 28 v cc 75 v ss 76 v ss 123 dq25 124 dq57 29 a0 30 a3 77 nc 78 nc 125 dq26 126 dq58 31 a1 32 a4 79 nc 80 nc 127 dq27 128 dq59 33 a2 34 a5 81 v cc 82 v cc 129 v cc 130 v cc 35 v ss 36 v ss 83 dq16 84 dq48 131 dq28 132 dq60 37 dq8 38 dq40 85 dq17 86 dq49 133 dq29 134 dq61 39 dq9 40 dq41 87 dq18 88 dq50 135 dq30 136 dq62 41 dq10 42 dq42 89 dq19 90 dq51 137 dq31 138 dq63 43 dq11 44 dq43 91 v ss 92 v ss 139 v ss 140 v ss 45 v cc 46 v cc 93 dq20 94 dq52 141 sda 142 scl 47 dq12 48 dq44 95 dq21 96 dq53 143 v cc 144 v cc ** these pins should be nc in the system which does not support spd.
W3DG64128V-D1 2 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs may 2005 rev. 2 preliminary functional block diagram cs1# cs0# dqm0 dqm4 dqm5 dqm1 dqm2 dq16 dq17 dq18 dq19 dq20 dq21 dq22 dq23 dq8 dq9 dq10 dq11 dq12 dq13 dq14 dq15 dq24 dq25 dq26 dq27 dq28 dq29 dq30 dq31 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq32 dq33 dq34 dq35 dq36 dq37 dq38 dq39 dq40 dq41 dq42 dq43 dq44 dq45 dq46 dq47 dq48 dq49 dq50 dq51 dq52 dq53 dq54 dq55 dq56 dq57 dq58 dq59 dq60 dq61 dq62 dq63 dqm3 ba0,ba1 a0-a12 ras# cas# cke0 cke1 we# sdrams sdrams sdrams sdrams sdrams sdrams sdrams ck0 sdrams pll serial pd scl sda a0 a1 a2 dqm6 dqm7 dm cs# dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dm cs# dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dm cs# dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dm cs# dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dm cs# dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dm cs# dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dm cs# dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dm cs# dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 cs# dqs cs# dqs cs# dqs cs# dqs cs# dqs cs# dqs cs# dqs cs# dqs note: all resistor values are 22 ohms unless otherwise speci? ed.
W3DG64128V-D1 3 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs may 2005 rev. 2 preliminary absolute maximum ratings parameter symbol value units voltage on any pin relative to v ss v in , v out -1.0 ~ 4.6 v voltage on v cc supply relative to v ss v cc , v ccq -1.0 ~ 4.6 v storage temperature t stg -55 ~ +150 c power dissipation p d 18 w short circuit current i os 50 ma note: permanent device damage may occur if absolute maximum ratingsv are exceeded. functional operation should be restricted to recommended operating condition. exposure to higher than recommended voltage for extended periods of time could affect device reliability. recommended dc operating conditions voltage referenced to: v ss = 0v, t a = 0c +70c parameter symbol min typ max unit note supply voltage v cc 3.0 3.3 3.6 v input high voltage v ih 2.0 3.0 v ccq+0.3 v1 input low voltage v il -0.3 0.8 v 2 output high voltage v oh 2.4 v i oh = -2ma output low voltage v ol 0.4 v i ol = -2ma input leakage current i li -10 10 a 3 note: 1. v ih (max)= 5.6v ac. the overshoot voltage duration is 3ns. 2. v il (min)= -2.0v ac. the undershoot voltage duration is 3ns. 3. any input 0v v in v ccq input leakage currents include hi-z output leakage for all bi-directional buffers with tri-state outputs. capacitance t a = 25c, f = 1mhz, v cc = 3.3v, v ref = 1.4v 200mv parameter symbol max unit input capacitance (a0-a12) c in1 66 pf input capacitance (ras#,cas#,we#) c in2 66 pf input capacitance (cke0) c in3 35 pf input capacitance (clk0) c in4 5.5 pf input capacitance (cs0#) c in5 35 pf input capacitance (dqm0-dqm7) c in6 11 pf input capacitance (ba0-ba1) c in7 66 pf data input/output capacitance (dq0-dq63) cou t 15 pf
W3DG64128V-D1 4 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs may 2005 rev. 2 preliminary operating current characteristics v cc = 3.3v, 0c t a +70c version parameter symbol conditions 133/100 units note operating current (one bank active) i cc1 burst length = 1 t rc t rc (min) i ol = 0ma 1,440 ma 1 precharge standby current in power down mode i cc2p cke v il (max), t cc = 10ns 32 ma i cc2ps cke & clk v il (max), t cc = 32 precharge standby current in non-power down mode i cc2n cke v ih (min), cs v ih (min), tcc =10ns input signals are charged one time during 20 320 ma i cc2ns cke v ih (min), clk v il (max), t cc = input signals are stable 160 active standby current in power-down mode i cc3p cke v il (max), t cc = 10ns 96 ma i cc3ps cke & clk v il (max), t cc = 96 active standby current in non-power down mode i cc3n cke v ih (min), cs v ih (min), tcc = 10ns input signals are changed one time during 20ns 480 ma i cc3ns cke v ih (min), clk v il (max), tcc = input signals are stable 400 ma operating current (burst mode) i cc4 io = ma page burst 4 banks activated t ccd = 2clk 1,600 ma 1 refresh current i cc5 t rc t rc (min) 3,200 ma 2 self refresh current i cc6 cke 0.2v 96 ma notes: 1. measured with outputs open. 2. refresh period is 64ms.
W3DG64128V-D1 5 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs may 2005 rev. 2 preliminary ac timing parameters symbol parameter speed grade 100mhz speed grade 133mhz units notes min max min max t ck clock period 10 7.5 ns t ch clock high time rated @1.5v 3 2.5 ns t cl clock low time 3 2.5 ns t is input setup times address/ command & cke 2 1.5 ns data 2 1.5 ns t ih input hold times address/command & cke 1 0.8 ns data 1 0.8 ns t ac output valid from clock cas# latency = 2 or 3, lvttl levels, rated @ 50 pf all outputs switching 6.0 (tco = 5.2) 5.4 (tco = 4.6) ns 1 t oh output hold from clock rated @ 50 pf (1.8 ns @ 0 pf) 3 2.7 ns t ohz output valid to z 3 9 2.7 7 ns t ccd cas to cas delay 1 1 t ck t cbd cas bank delay 1 1 t ck t cke cke to clock disable 1 1 t ck t rp ras precharge time 20 20 ns t ras ras active time 50 45 ns t rcd activate to command delay (ras to cas delay) 20 20 ns t rrd ras to ras bank activate delay 20 15 ns t rc ras cycle time 70 67.5 ns t dqd dqm to input data delay 0 0 t ck t dwd write cmd. to input data delay 0 0 t ck t mrd mode register set to active delay 3 3 t ck t roh precharge to o/p in high z cl cl t ck 2 t dqz dqm to data in high z for read 2 2 t ck t dqm dqm to data mask for write 0 0 t ck 3 t dpl data-in to pre command period 20 15 ns t dal data-in to act (pre) command period (auto precharge) 5 5 t ck t sb power down mode entry 1 1 t ck t srx self refresh exit time 10 10 ns 4 t pde power down exit set up time 1 1 t ck 5 t ckstp clock stop during self refresh or power down 200 200 t ck 6 t ref refresh period 64 64 ms t rfc row refresh cycle time 80.0 75.0 ns 1. access times to be measured w/input signals of 1 v/ns edge rate, 0.8 v to 2.0 v, tco is clock to output with no load. 2. cl = cas latency 3. data masked on the same clock 4. self refresh exit is asynchronous, requiring 10 ns to ensure initiation. self refresh exit is complete in 10 ns + trc. 5. timing is asynchronous. if tis is not met by rising edge of ck then cke is assumed latched on next cycle. 6. if the clock is stopped during self refresh or power down, 200 clocks are required before cke is high.
W3DG64128V-D1 6 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs may 2005 rev. 2 preliminary notes: ? consult factory for availability of rohs products. (g = rohs compliant) ? vendor speci? c part numbers are used to provide memory components source control. the place holder for this is shown as lower case x in the part numbers above and is to be replaced with the respective vendors code. consult factory for quali? ed sourcing options. (m = micron, s = samsung & consult factory for others) ? consult factory for availability of industrial temperature (-40c to 85c) option ordering information speed cas latency height* w3dg64128v10d1 100mhz cl=2 31.75 (1.25) w3dg64128v7d1 133mhz cl=2 31.75 (1.25) w3dg64128v75d1 133mhz cl=3 31.75 (1.25) package dimensions for d1 3.99 (0.157) 2.01 (0.079 min) 67.72 (2.661 max) pll 32.79 (1.291) 4.60 (0.181) 1.50 (0.059) 28.2 (1.112) 23.14 (0.913) 19.99 (0.787) 31.75 (1.25) max 4.01 (0.158) min 3.20 (0.126) min 6.35 (0.250) max 0.99 0.10 (0.039 0.004) package dimensions for d1 * all dimensions are in millimeters and (inches).
W3DG64128V-D1 7 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs may 2005 rev. 2 preliminary document title 1gb C 2x64mx64 sdram, unbuffered w/pll revision history rev # history release date status rev 0 created datasheet 6-03 advanced rev 1 1.1 updated datasheet 1.2 removed ed from part marking 5-04 preliminary rev 2 2.1 added lead-free and rohs options 2.2 added source control option 2.3 added industrial temperature option 2.4 added ac specs 5-05 preliminary
|
